SiP and Chiplets in Heterogeneous Integration of Electronic Systems

Co-hosted by the Electronic Packaging Society (EPS) of IEEE and the SEMI Americas Advanced Packaging Committee 

Two trends have been driving innovation in the design and manufacturing of microelectronics for several years now – the move from predominantly chip-level design and manufacturing to more of a system level approach, and the pervasiveness of compute across every sector from medical to mobility.

As the full microelectronics design and manufacturing supply chain come together to answer challenges and develop new solutions, two integration technologies, in particular, are helping to make these innovations possible – System in Package (SiP) and Chiplet Integration. By co-designing in an application and system-down approach, innovators across the ecosystem have been able to deliver the next extension of Moore’s law. This session will also take a full ecosystem approach to look at how SiP and Chiplets are providing a pathway to next generation heterogeneous integration innovation.